Part Number Hot Search : 
W83321G EZQAFDA BA2107G M3L24TCN PDTC1 AM27C010 MPS2810 CUN8AF1A
Product Description
Full Text Search
 

To Download MC74ACT160 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  5-1 fact data  

 the mc74ac160/74act160 and mc74ac162/74act162 are high-speed synchronous decade counters operating in the bcd (8421) sequence. they are synchronously presettable for application in programmable dividers and have two types of count enable inputs plus a terminal count output for versatility in forming synchronous multistage counters. the mc74ac160/74act160 has an asynchronous master reset input that overrides all other inputs and forces the outputs low. the mc74ac162/74act162 has a synchronous reset input that overrides counting and parallel loading and allows all outputs to be simultaneously reset on the rising edge of the clock. ? synchronous counting and loading ? high-speed synchronous expansion ? typical count rate of 120 mhz ? outputs source/sink 24 ma ? act160 and act162 have ttl compatible inputs 15 16 14 13 12 11 10 2 1 3 4 5 6 7 v cc 9 8 *r p 0 cp p 1 p 2 p 3 cep gnd tc q 0 q 1 q 2 q 3 cet pe pin names cep count enable parallel input cet count enable trickle input cp clock pulse input mr ( 160) asynchronous master reset input sr ( 162) synchronous reset input p 0 p 3 parallel data inputs pe parallel enable input q 0 q 3 flip-flop outputs tc terminal count output







 synchronous presettable bcd decade counter n suffix case 648-08 plastic d suffix case 751b-05 plastic logic symbol pe p 0 p 1 p 2 cep p 3 cet cp *r q 0 q 1 q 2 q 3 tc *mr for 160 *sr for 162
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-2 fact data functional description the m c74ac160/74act16 0 a n d m c74ac162/74act162 count m odulo-1 0 i n t h e b c d ( 8421 ) s equence . from state 9 (hllh) they increment to state 0 (llll). the clock inputs of all flip-flops are driven in parallel through a clock buf fer. thus all changes of the q outputs (except due to master reset of the 160) occur as a result of, and synchronous with, the low-to-high transition of the cp input signal. t h e c ircuits have f ou r f undamenta l m ode s o f o peration , i n o rde r o f precedence: a synchronou s r ese t ( 160) , s ynchronous r eset ( 162), parallel load, count-up and hold. five control inputs e master reset (mr , 160), synchronous reset (sr , 162), parallel enable (pe ), count enable parallel (cep) and count enable t rickle (cet) e determine the mode of operation, as shown in the mode select t able. a low signal on mr overrides all other inputs and asynchronously forces all outputs low . a low signal on sr overrides counting and parallel loading and allows all outputs to go low on the next rising edge of cp . a low signal on pe overrides counting and allows information on the parallel data (p n ) inputs to be loaded into the flip-flops on the next rising edge of cp . with pe and mr ( 160) or sr ( 162) high, cep and cet permit counting when both are high. conversely , a low signal on either cep or cet inhibits counting. the m c74ac160/74act16 0 a n d m c74ac162/74act162 use d-type edge-triggered flip-flops and changing the sr , pe , cep and cet inputs when the cp is in either state does not cause errors, provided that the recommended setup and hold times, with respect to the rising edge of cp, are observed. the t erminal count (tc) output is high when cet is high and counter is in state 9. t o implement synchronous multistage counters, the tc outputs can be used with the cep and cet inputs in two dif ferent ways. please refer to the mc74ac568 data sheet. the tc output is subject to decoding spikes due to internal race conditions and is therefore not recommended f o r u s e a s a c loc k o r a synchronou s r ese t f or flip-flops, counters or registers. in the mc74ac160/74act160 and mc74ac162/74act162 decade counters, the t c outpu t i s fully d ecode d a n d c a n o nl y be high in state 9. if a decade counter is preset to an illegal state, or assumes an illegal state when power is applied, it will return to the normal sequence within two counts, as shown in the state diagram. logic equations: count enable = cep ? cet ? pe tc = q 0 ? q 1 ? q 2 ? q 3 ? cet mode select table *sr pe cet cep action on the rising clock edge ( ) l x x x reset (clear) h l x x load (p n q n ) h h h h count (increment) h h l x no change (hold) h h x l no change (hold) *for 162 only h = high voltage level l = low voltage level x = immaterial state diagram 0 1 2 4 5 6 7 8 9 10 11 12 13 14 15 3
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-3 fact data c d pe p 0 p 1 p 2 cep p 3 cet cp q 0 q 1 q 2 q 3 tc mr 160 sr 162 162 only 162 cp q 0 q 0 cp detail a detail a detail a detail a d cp d q q logic diagram please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 160 only 160 maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) 0.5 to +7.0 v v in dc input voltage (referenced to gnd) 0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) 0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage temperature 65 to +150 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-4 fact data recommended operating conditions symbol parameter min typ max unit v cc supply voltage ac 2.0 5.0 6.0 v v cc supply voltage act 4.5 5.0 5.5 v v in , v out dc input voltage, output voltage (ref. to gnd) 0 v cc v t r , t f input rise and fall time (note 1) ac devices except schmitt inputs v cc @ 3.0 v 150 t r , t f input rise and fall time (note 1) ac devices except schmitt inputs v cc @ 4.5 v 40 ns/v r , t f ac devices except schmitt inputs v cc @ 5.5 v 25 t r , t f input rise and fall time (note 2) act devices except schmitt inputs v cc @ 4.5 v 10 ns/v t r , t f input rise and fall time (note 2) act devices except schmitt inputs v cc @ 5.5 v 8.0 ns/v t j junction temperature (pdip) 140 c t a operating ambient temperature range 40 25 85 c i oh output current e high 24 ma i ol output current e low 24 ma 1. v in from 30% to 70% v cc ; see individual data sheets for devices that dif fer from the typical input rise and fall times. 2. v in from 0.8 v to 2.0 v ; see individual data sheets for devices that dif fer from the typical input rise and fall times. dc characteristics symbol parameter v cc (v) 74ac 74ac unit conditions symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level input voltage 3.0 1.5 2.1 2.1 v out = 0.1 v input voltage 4.5 2.25 3.15 3.15 v or v cc 0.1 v 5.5 2.75 3.85 3.85 v il maximum low level input voltage 3.0 1.5 0.9 0.9 v out = 0.1 v input voltage 4.5 2.25 1.35 1.35 v or v cc 0.1 v 5.5 2.75 1.65 1.65 v oh minimum high level output voltage 3.0 2.99 2.9 2.9 i out = 50 m a output voltage 4.5 4.49 4.4 4.4 v 5.5 5.49 5.4 5.4 v *v in = v il or v ih 3.0 2.56 2.46 v 12 ma 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 24 ma v ol maximum low level output voltage 3.0 0.002 0.1 0.1 i out = 50 m a output voltage 4.5 0.001 0.1 0.1 v 5.5 0.001 0.1 0.1 v *v in = v il or v ih 3.0 0.36 0.44 v 12 ma 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 24 ma i in maximum input leakage current 5.5 0.1 1.0 m a v i = v cc , gnd leakage current 5.5 0.1 1.0 m a v i = v cc , gnd i old 2minimum dynamic output current 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 8.0 80 m a v in = v cc or gnd supply current 5.5 8.0 80 m a v in = v cc or gnd * all outputs loaded; thresholds on input associated with output under test. 2 maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc .
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-5 fact data mc74ac160 ac characteristics (for figures and waveforms e see section 3) symbol parameter v cc * (v) 74ac160 74ac160 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min max min max f max maximum count 3.3 65 e 60 e mhz 3-3 f max frequency 5.0 110 e 95 e mhz 3-3 t plh propagation delay 3.3 2.0 12.0 1.5 14.0 ns 3-6 t plh cp to q n (pe input high) 5.0 1.5 9.0 1.0 10.5 ns 3-6 t phl propagation delay 3.3 2.0 12.0 1.5 14.0 ns 3-6 t phl cp to q n (pe input high) 5.0 1.5 9.0 1.5 10.5 ns 3-6 t plh propagation delay 3.3 2.0 12.0 1.5 14.0 ns 3-6 t plh cp to q n (pe input low) 5.0 1.5 9.0 1.0 10.5 ns 3-6 t phl propagation delay 3.3 2.0 12.0 1.5 14.0 ns 3-6 t phl cp to q n (pe input low) 5.0 1.5 9.0 1.5 10.5 ns 3-6 t plh propagation delay 3.3 3.0 15.0 2.5 17.5 ns 3-6 t plh cp to tc 5.0 2.0 11.0 1.5 12.5 ns 3-6 t phl propagation delay 3.3 3.5 14.5 2.5 16.5 ns 3-6 t phl cp to tc 5.0 2.0 11.0 2. 0 12.5 ns 3-6 t plh propagation delay 3.3 2.0 10.5 1.5 12.5 ns 3-6 t plh cet to tc 5.0 1.5 7.5 1.0 9.0 ns 3-6 t phl propagation delay 3.3 2.5 11.5 2.0 13.5 ns 3-6 t phl cet to tc 5.0 2.0 9.0 1.5 10.5 ns 3-6 t phl propagation delay 3.3 2.0 12.0 1.5 13.5 ns 3-6 t phl mr to q n ( ac160) 5.0 1.5 9.5 1.0 10.0 ns 3-6 t phl propagation delay 3.3 3.5 15.0 3.0 17.0 ns 3-6 t phl mr to tc 5.0 2.5 12.0 2.0 13.5 ns 3-6 * voltage range 3.3 v is 3.3 v 0.3 v. v oltage range 5.0 v is 5.0 v 0.5 v.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-6 fact data mc74ac162 ac characteristics (for figures and waveforms e see section 3) symbol parameter v cc * (v) 74ac162 74ac162 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f max maximum count 3.3 80 60 mhz 3-3 f max frequency 5.0 125 100 mhz 3-3 t plh propagation delay 3.3 2.0 12.0 1.5 13.5 ns 3-6 t plh cp to q n (pe input high) 5.0 2.0 9.0 1.5 10.5 ns 3-6 t phl propagation delay 3.3 2.0 12.0 1.5 13.5 ns 3-6 t phl cp to q n (pe input high) 5.0 2.0 9.0 1.5 10.5 ns 3-6 t plh propagation delay 3.3 2.0 12.0 1.5 13.5 ns 3-6 t plh cp to q n (pe input low) 5.0 2.0 9.0 1.5 10.5 ns 3-6 t phl propagation delay 3.3 2.0 12.0 1.5 13.5 ns 3-6 t phl cp to q n (pe input low) 5.0 2.0 9.0 1.5 10.5 ns 3-6 t plh propagation delay 3.3 2.0 15.0 1.5 17.0 ns 3-6 t plh cp to tc 5.0 2.0 11.0 1.5 13.0 ns 3-6 t phl propagation delay 3.3 2.0 14.0 1.5 16.0 ns 3-6 t phl cp to tc 5.0 2.0 11.0 1.5 13.0 ns 3-6 t plh propagation delay 3.3 2.0 10.0 1.5 11.5 ns 3-6 t plh cet to tc 5.0 2.0 7.0 1.5 8.5 ns 3-6 t phl propagation delay 3.3 2.0 11.0 1.5 12.5 ns 3-6 t phl cet to tc 5.0 2.0 8.0 1.5 9.5 ns 3-6 *voltage range 3.3 v is 3.0 v 0.3 v. v oltage range 5.0 v is 5.0 v 0.5 v.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-7 fact data mc74ac160 ac operating requirements symbol parameter v cc * (v) 74ac160 74ac160 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. guaranteed maximum t s setup time, high or low 3.3 13.5 16.0 ns 3-9 t s p n to cp 5.0 8.5 10.5 ns 3-9 t h hold time, high or low 3.3 1.0 0.5 ns 3-9 t h p n to cp 5.0 0 0 ns 3-9 t s setup time, high or low 3.3 11.5 14.0 ns 3-9 t s pe or sr to cp 5.0 7.5 8.5 ns 3-9 t h hold time, high or low 3.3 0 0 ns 3-9 t h pe or sr to cp 5.0 0.5 1.0 ns 3-9 t s setup time, high or low 3.3 6.0 7.0 ns 3-9 t s cep or cet to cp 5.0 4.5 5.0 ns 3-9 t h hold time, high or low 3.3 0 0 ns 3-9 t h cep or cet to cp 5.0 0 0.5 ns 3-9 t w clock pulse width (load) 3.3 4.0 5.0 ns 3-6 t w high or low 5.0 3.0 3.5 ns 3-6 t w clock pulse width (count) 3.3 7.0 7.5 ns 3-6 t w high or low 5.0 4.5 5.5 ns 3-6 t w mr pulse width, low 3.3 5.5 7.5 ns 3-6 t w ( ac160) 5.0 4.5 6.0 ns 3-6 t rec recovery time 3.3 0.5 0 ns 3-9 t rec mr to cp ( ac160) 5.0 0 0.5 ns 3-9 * voltage range 3.3 v is 3.3 v 0.3 v. v oltage range 5.0 v is 5.0 v 0.5 v.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-8 fact data mc74ac162 ac operating requirements symbol parameter v cc * (v) 74ac162 74ac162 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed minimum t s setup time, high or low 3.3 8.0 9.0 ns 3-9 t s p n to cp 5.0 5.0 6.0 ns 3-9 t h hold time, high or low 3.3 0.5 1.0 ns 3-9 t h p n to cp 5.0 0.5 1.0 ns 3-9 t s setup time, high or low 3.3 10.0 11.0 ns 3-9 t s pe to cp 3.3 6.0 7.0 ns 3-9 t h hold time, high or low 3.3 0.5 1.0 ns 3-9 t h pe to cp 5.0 0.5 1.0 ns 3-9 t s setup time, high or low 3.3 6.0 7.0 ns 3-9 t s cep or cet to cp 5.0 4.0 5.0 ns 3-9 t h hold time, high or low 3.3 0.5 1.0 ns 3-9 t h cep or cet to cp 5.0 0.5 1.0 ns 3-9 t s setup time, high or low 3.3 8.0 9.0 ns 3-9 t s sr to cp 5.0 6.0 7.0 ns 3-9 t h hold time, high or low 3.3 0.5 1.0 ns 3-9 t h sr to cp 5.0 0.5 1.0 ns 3-9 t w clock pulse width (load) 3.3 5.5 6.0 ns 3-6 t w high or low 5.0 4.5 5.0 ns 3-6 t w clock pulse width (count) 3.3 5.0 5.5 ns 3-6 t w high or low 5.0 4.0 4.5 ns 3-6 *voltage range 3.3 v is 3.3 v 0.3 v. v oltage range 5.0 v is 5.0 v 0.5 v.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-9 fact data dc characteristics symbol parameter v cc (v) 74act 74act unit conditions symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level input voltage 4.5 1.5 2.0 2.0 v v out = 0.1 v input voltage 5.5 1.5 2.0 2.0 v or v cc 0.1 v v il maximum low level input voltage 4.5 1.5 0.8 0.8 v v out = 0.1 v input voltage 5.5 1.5 0.8 0.8 v or v cc 0.1 v v oh minimum high level output voltage 4.5 4.49 4.4 4.4 v i out = 50 m a output voltage 5.5 5.49 5.4 5.4 v *v in = v il or v ih 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 i oh 24 ma v ol maximum low level output voltage 4.5 0.001 0.1 0.1 v i out = 50 m a output voltage 5.5 0.001 0.1 0.1 v *v in = v il or v ih 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 i ol 24 ma i in maximum input leakage current 5.5 0.1 1.0 m a v i = v cc , gnd leakage current 5.5 0.1 1.0 m a v i = v cc , gnd d i cct additional max. i cc /input 5.5 0.6 1.5 ma v i = v cc 2.1 v i old 2minimum dynamic output current 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 8.0 80 m a v in = v cc or gnd supply current 5.5 8.0 80 m a v in = v cc or gnd * all outputs loaded; thresholds on input associated with output under test. 2 maximum test duration 2.0 ms, one output loaded at a time.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-10 fact data MC74ACT160 ac characteristics (for figures and waveforms e see section 3) symbol parameter v cc * (v) 74act160 74act160 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f max maximum count 5.0 120 100 mhz 3-3 f max frequency 5.0 120 100 mhz 3-3 t plh propagation delay 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t plh cp to q n (pe input high) 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t phl propagation delay 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t phl cp to q n (pe input high) 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t plh propagation delay 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t plh cp to q n (pe input low) 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t phl propagation delay 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t phl cp to q n (pe input low) 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t plh propagation delay 5.0 2.0 8.0 12.0 2.0 14.0 ns 3-6 t plh cp to tc 5.0 2.0 8.0 12.0 2.0 14.0 ns 3-6 t phl propagation delay 5.0 2.0 8.0 12.0 2.0 14.0 ns 3-6 t phl cp to tc 5.0 2.0 8.0 12.0 2.0 14.0 ns 3-6 t plh propagation delay 5.0 2.0 6.0 8.5 2.0 9.5 ns 3-6 t plh cet to tc 5.0 2.0 6.0 8.5 2.0 9.5 ns 3-6 t phl propagation delay 5.0 2.0 7.0 9.5 2.0 11.0 ns 3-6 t phl cet to tc 5.0 2.0 7.0 9.5 2.0 11.0 ns 3-6 t phl propagation delay 5.0 1.5 6.0 9.5 1.5 11.0 ns 3-6 t phl mr to q n ( ac160) 5.0 1.5 6.0 9.5 1.5 11.0 ns 3-6 t phl propagation delay 5.0 2.5 e 13.0 2.5 14.0 ns 3-6 t phl mr to tc 5.0 2.5 e 13.0 2.5 14.0 ns 3-6 * voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-11 fact data mc74act162 ac characteristics (for figures and waveforms e see section 3) symbol parameter v cc * (v) 74act162 74act162 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f max maximum count 5.0 120 100 mhz 3-3 f max frequency 5.0 120 100 mhz 3-3 t plh propagation delay 5.0 2.0 6.0 10.0 2.0 11.5 ns 3-6 t plh cp to q n (pe input high) 5.0 2.0 6.0 10.0 2.0 11.5 ns 3-6 t phl propagation delay 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t phl cp to q n (pe input high) 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t plh propagation delay 5.0 2.0 6.0 10.0 2.0 11.5 ns 3-6 t plh cp to q n (pe input low) 5.0 2.0 6.0 10.0 2.0 11.5 ns 3-6 t phl propagation delay 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t phl cp to q n (pe input low) 5.0 2.0 6.0 10.0 2.0 11.0 ns 3-6 t plh propagation delay 5.0 2.0 8.0 13.0 2.0 14.5 ns 3-6 t plh cp to tc 5.0 2.0 8.0 13.0 2.0 14.5 ns 3-6 t phl propagation delay 5.0 2.0 8.0 13.0 2.0 14.5 ns 3-6 t phl cp to tc 5.0 2.0 8.0 13.0 2.0 14.5 ns 3-6 t plh propagation delay 5.0 2.0 6.0 9.0 2.0 10.5 ns 3-6 t plh cet to tc 5.0 2.0 6.0 9.0 2.0 10.5 ns 3-6 t phl propagation delay 5.0 2.0 6.0 9.0 2.0 10.5 ns 3-6 t phl cet to tc 5.0 2.0 6.0 9.0 2.0 10.5 ns 3-6 * voltage range 5.0 v is 5.0 v 0.5 v. 3
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-12 fact data MC74ACT160 ac operating requirements symbol parameter v cc * (v) 74act160 74act160 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed maximum t s setup time, high or low 5.0 4.0 6.5 8.0 ns 3-9 t s p n to cp 5.0 4.0 6.5 8.0 ns 3-9 t h hold time, high or low 5.0 4.0 0.5 0 ns 3-9 t h p n to cp 5.0 4.0 0.5 0 ns 3-9 t s setup time, high or low 5.0 4.0 8.5 10.5 ns 3-9 t s pe or mr to cp 5.0 4.0 8.5 10.5 ns 3-9 t h hold time, high or low 5.0 4.0 0 0 ns 3-9 t h pe or mr to cp 5.0 4.0 0 0 ns 3-9 t s setup time, high or low 5.0 3.0 6.0 7.0 ns 3-9 t s cep or cet to cp 5.0 3.0 6.0 7.0 ns 3-9 t h hold time, high or low 5.0 3.0 0 0 ns 3-9 t h cep or cet to cp 5.0 3.0 0 0 ns 3-9 t w clock pulse width (load) 5.0 3.0 4.0 4.0 ns 3-6 t w high or low 5.0 3.0 4.0 4.0 ns 3-6 t w clock pulse width (count) 5.0 3.0 4.0 4.0 ns 3-6 t w high or low 5.0 3.0 4.0 4.0 ns 3-6 t w mr pulse width, low 5.0 2.0 4.0 6.0 ns 3-6 t w ( act160) 5.0 2.0 4.0 6.0 ns 3-6 t rec recovery time 5.0 1.0 0 0 ns 3-9 t rec mr to cp ( act160) 5.0 1.0 0 0 ns 3-9 * voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-13 fact data mc74act162 ac operating requirements symbol parameter v cc * (v) 74act162 74act162 unit fig. no. symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed maximum t s setup time, high or low 5.0 4.0 7.0 10.0 ns 3-9 t s p n to cp 5.0 4.0 7.0 10.0 ns 3-9 t h hold time, high or low 5.0 3.0 1.0 0 ns 3-9 t h p n to cp 5.0 3.0 1.0 0 ns 3-9 t s setup time, high or low 5.0 4.0 7.0 10.0 ns 3-9 t s pe to cp 5.0 4.0 7.0 10.0 ns 3-9 t h hold time, high or low 5.0 3.0 1.0 0 ns 3-9 t h pe to cp 5.0 3.0 1.0 0 ns 3-9 t s setup time, high or low 5.0 5.0 10 11.5 ns 3-9 t s sr to cp 5.0 5.0 10 11.5 ns 3-9 t h hold time, high or low 5.0 5.0 0 0 ns 3-9 t h sr to cp 5.0 5.0 0 0 ns 3-9 t s setup time, high or low 5.0 3.0 6.0 7.0 ns 3-9 t s cet to cp 5.0 3.0 6.0 7.0 ns 3-9 t h hold time, high or low 5.0 3.0 0 0 ns 3-9 t h cet to cp 5.0 3.0 0 0 ns 3-9 t w clock pulse width (load) 5.0 2.0 4.5 5.0 ns 3-6 t w high or low 5.0 2.0 4.5 5.0 ns 3-6 t w clock pulse width (count) 5.0 2.0 4.0 4.5 ns 3-6 t w high or low 5.0 2.0 4.0 4.5 ns 3-6 * voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c pd power dissipation capacitance 45 pf v cc = 5.0 v
mc74ac160 MC74ACT160 mc74ac162 mc74act162 5-14 fact data outline dimensions n suffix plastic dip package case 64808 issue r d suffix plastic soic package case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 1 8 16 9 seating plane f j m r x 45  g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019     notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 1 8 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01     how to reach us: usa/europe : motorola literature distribution; japan : nippon motorola ltd.; tatsumispdjldc, toshikatsu otsuki, p.o. box 20912; phoenix, arizona 85036. 18004412447 6f seibubutsuryucenter, 3142 tatsumi kotoku, tokyo 135, japan. 0335218315 mfax : rmf ax0@email.sps.mot.com touchtone (602) 2446609 hong kong : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, internet : http://designnet.com 51 ting kok road, tai po, n.t., hong kong. 85226629298 motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation consequential or incidental damages. at ypicalo parameters can and do vary in dif ferent applications. all operating parameters, including at ypicalso must be validated for each customer application by customer ' s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur . should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/af firmative action employer . mc74ac160/d   
 ?


▲Up To Search▲   

 
Price & Availability of MC74ACT160

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X